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基于FPGA的电力电子恒导纳开关模型修正算法及实时仿真架构
作者:
作者单位:

哈尔滨工业大学(深圳)机电工程与自动化学院,广东省深圳市 518055

摘要:

电力电子实时仿真是目前电力电子系统研究过程中的重要工具。为设计一套经济、可靠的电力电子实时仿真系统,文中搭建了一个以现场可编程门阵列(FPGA)为计算核心的硬件平台,并提出了配套的电磁仿真算法和FPGA架构设计。首先,推导了一种简洁电磁暂态程序(EMTP)算法,用于提高传统离线算法的并行度。其次,从数值算法的角度分析恒导纳开关模型的虚拟功率损耗问题,提出了一种初始误差修正算法,消除了功率损耗。再次,串联以上算法,设计了一种基于状态机框架的数字信号处理(DSP)硬核资源复用FPGA架构,以硬件资源复用的方式实现了资源的高效利用,在不损失速度的同时提高了FPGA的利用效率。最后,通过多个实时仿真算例验证了所提方法的有效性和正确性。

关键词:

基金项目:

国家自然科学基金资助项目(52077045);广东省基础与应用基础研究基金资助项目(2022A1515240078)。

通信作者:

作者简介:

王钦盛(1998—),男,硕士研究生,主要研究方向:电磁暂态实时仿真。E-mail:wangqinsheng1010@qq.com
王灿(1984—),男,通信作者,博士,副教授,IEEE Member,主要研究方向:柔性直流输电、交直流混合微电网、新能源汽车驱动电力电子系统。E-mail:can.wang@hit.edu.cn
潘学伟(1988—),男,博士,特聘研究员,主要研究方向:智能混合型微电网、可再生能源转换/分布式发电系统等。E-mail:davidpeterpan@163.com


Fixed-admittance Switch Model Correction Algorithm and Real-time Simulation Architecture of Power Electronics Based on Field Programmable Gate Array
Author:
Affiliation:

School of Mechanical Engineering and Automation, Harbin Institute of Technology, Shenzhen 518055, China

Abstract:

Real-time simulation of power electronics is currently an important tool in the research process of power electronic systems. In order to design an economical and reliable real-time simulation system of power electronics, this paper builds a hardware platform with the field-programmable gate array (FPGA) as the computing core and proposes a supporting electromagnetic simulation algorithm and the FPGA architecture design. Firstly, a simplified electromagnetic transient programs (EMTP) algorithm is derived to improve the parallelism of traditional off-line algorithms. Secondly, the virtual power loss problem of the fixed-admittance switch model is analyzed from the perspective of the numerical algorithm, and an initial error correction algorithm is proposed to eliminate the power loss. Thirdly, in tandem with the above algorithms, an FPGA architecture with digital signal processing (DSP) hardcore resource reuse based on the state machine framework is designed to realize the efficient utilization of resources in the way of hardware resource reuse, which improves the utilization efficiency of the FPGA without loss of speed. Finally, the effectiveness and correctness of the proposed method are verified by several real-time simulation cases.

Keywords:

Foundation:
This work is supported by National Natural Science Foundation of China (No. 52077045) and Guangdong Provincial Basic and Applied Basic Research Foundation (No. 2022A1515240078).
引用本文
[1]王钦盛,王灿,潘学伟,等.基于FPGA的电力电子恒导纳开关模型修正算法及实时仿真架构[J].电力系统自动化,2024,48(1):150-159. DOI:10.7500/AEPS20230419011.
WANG Qinsheng, WANG Can, PAN Xuewei, et al. Fixed-admittance Switch Model Correction Algorithm and Real-time Simulation Architecture of Power Electronics Based on Field Programmable Gate Array[J]. Automation of Electric Power Systems, 2024, 48(1):150-159. DOI:10.7500/AEPS20230419011.
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  • 收稿日期:2023-04-19
  • 最后修改日期:2023-08-09
  • 录用日期:2023-08-14
  • 在线发布日期: 2024-01-11
  • 出版日期: